Sergey,
Sergey,you are welcome! Maybe you find this list of Intel TSX-related resources useful: http://www.intel.com/software/tsxThanks,Roman
View ArticleRoman,
Roman,I wish to present a simplified example and ask would the following code properly function using RTM?Assume you have a ring buffer of size size, fill index fill, empty index empty.Assume size of...
View ArticleFollow-up question relating
Follow-up question relating to pop() in above example:As written, when the ring buffer is empty, the pop() is performing _xbegin() and _xend() but (when buffer empty) does not modify memory. Will this...
View ArticleHi Jim,
Hi Jim,in general RTM does not guarantee that any particular transaction will always succeed (also if retried for many times). For example if there is a page fault on the first access to your buffer...
View ArticleЦитата:Follow-up question relating to pop() in above example:As written, when the ring buffer is empty, the pop() is performing _xbegin() and _xend() but (when buffer empty) does not modify memory....
View Article[block]
Цитата:When the fill and empty pointers are cache aligned (in seperated cache lines), then push(p) cannot be aborted by pop() or push(p) issued concurrently by other thread.push can be aborted by pop...
View ArticleThe "//" seemed to get
The "//" seemed to get clobbered after the } on line 22 (made comment into statement)Good point about page fault, revised code then should have the while(true) loop touch the locations such that the...
View ArticleHi Roman,
Hi Roman,>>Chapter 12 of the most recent (June 2013) "Intel 64 and IA-32 Architectures Optimization Reference Manual" contains>>enabling and tuning recommendations for Intel(r)...
View ArticleHi Sergey,
Hi Sergey,I counted 28 pages in Chapter 12 :-) . Section 12.3 has code examples for lock elision with Intel TSXFor further information you can look into www.intel.com/software/tsx (subscribe for page...
View ArticleHi Roman,
Hi Roman,>>I counted 28 pages in Chapter 12 :-) . Section 12.3 has code examples for lock elision with Intel TSX>>>>For further information you can look into...
View ArticleSergey,
Sergey,you are welcome! Maybe you find this list of Intel TSX-related resources useful: http://www.intel.com/software/tsxThanks,Roman
View ArticleRoman,
Roman,I wish to present a simplified example and ask would the following code properly function using RTM?Assume you have a ring buffer of size size, fill index fill, empty index empty.Assume size of...
View ArticleFollow-up question relating
Follow-up question relating to pop() in above example:As written, when the ring buffer is empty, the pop() is performing _xbegin() and _xend() but (when buffer empty) does not modify memory. Will this...
View ArticleHi Jim,
Hi Jim,in general RTM does not guarantee that any particular transaction will always succeed (also if retried for many times). For example if there is a page fault on the first access to your buffer...
View ArticleQuote:Follow-up question relating to pop() in above example:As written, when the ring buffer is empty, the pop() is performing _xbegin() and _xend() but (when buffer empty) does not modify memory. Will...
View Article[block]
Quote:When the fill and empty pointers are cache aligned (in seperated cache lines), then push(p) cannot be aborted by pop() or push(p) issued concurrently by other thread.push can be aborted by pop...
View ArticleThe "//" seemed to get
The "//" seemed to get clobbered after the } on line 22 (made comment into statement)Good point about page fault, revised code then should have the while(true) loop touch the locations such that the...
View ArticleHi Roman,
Hi Roman,>>Chapter 12 of the most recent (June 2013) "Intel 64 and IA-32 Architectures Optimization Reference Manual" contains>>enabling and tuning recommendations for Intel(r)...
View ArticleHi Sergey,
Hi Sergey,I counted 28 pages in Chapter 12 :-) . Section 12.3 has code examples for lock elision with Intel TSXFor further information you can look into www.intel.com/software/tsx (subscribe for page...
View ArticleHi Roman,
Hi Roman,>>I counted 28 pages in Chapter 12 :-) . Section 12.3 has code examples for lock elision with Intel TSX>>>>For further information you can look into...
View Article
